SAN JOSE, Calif.–(BUSINESS WIRE)–Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced it will
showcase the Cadence® Verification Suite and its most recent
innovations at DVCon 2019. The event is being held from February 25 to
28, 2019 in San Jose, Calif., with Cadence, a gold sponsor, in Booth
702. To learn more about the Cadence activities at DVCon and register
for the conference, visit www.cadence.com/go/dvcon2019.
WHAT: Cadence is scheduled to deliver several presentations,
panels and tutorials for DVCon attendees. The sessions are as follows:
Workshop: “Going Practical with Portable Testing and Stimulus Standard
(PSS)”, Monday, February 25 at 3:30 p.m., Sharon Rosenberg, Senior
Poster: “How to Create Reusable Portable Testing and Stimulus Standard
VIP”, Tuesday, February 26 at 10:30 a.m., Sharon Rosenberg, Senior
Poster: “Utilizing Technology Implementation Data in Blended HW/SW
Power Optimization”, Tuesday, February 26 at 10:30 a.m., Frank
Schirrmeister, Senior Product Management Group Director
Paper: “Yikes, Why Is My SystemVerilog So Sloooow?”, Tuesday, February
26 at 3:00 p.m., John Rose, Senior Product Engineering Architect
Paper: “NVME Development and Debug for a 16x Multicore System”,
Wednesday, February 27 at 10:00 a.m., Arindum Guha, Application
Paper: “Test-Driving PSS for System Low-Power Validation”, Wednesday,
February 27 at 10:00 a.m., Matan Vax, Distinguished Engineer
Lunch panel: “Data-Driven Verification: Going Beyond Metrics to
Efficiency”, Wednesday, February 27 at 12:00 p.m., Larry Melling,
Product Management Director
Paper: “Coherency Verification and Deadlock Detection Using Perspec™
PSS”, Wednesday, February 27 at 3:00 p.m., Phu Huynh, Solutions
Tutorial: “Data-Driven Verification: Driving the Next Wave of
Productivity Improvements”, Thursday, February 28 at 8:30 a.m., Larry
Melling, Product Management Director
In addition, attendees will have the opportunity to hold in-depth
discussions on a variety of verification topics with Cadence subject
matter experts at the booth. Experts will be available to discuss
simulation, hardware-based verification (including emulation and
FPGA-based prototyping), mixed-signal verification, formal verification,
Verification IP (VIP) and system verification using portable stimulus.
WHEN: DVCon is scheduled for February 25 – 28, 2019.
WHERE: The Doubletree Hotel, 2050 Gateway Place, San Jose, Calif.
Cadence is located in Booth 702.
Cadence enables electronic systems and semiconductor companies to create
the innovative end products that are transforming the way people live,
work and play. Cadence software, hardware and semiconductor IP are used
by customers to deliver products to market faster. The company’s System
Design Enablement strategy helps customers develop differentiated
products—from chips to boards to systems—in mobile, consumer, cloud
datacenter, automotive, aerospace, IoT, industrial and other market
segments. Cadence is listed as one of Fortune Magazine’s 100 Best
Companies to Work For. Learn more at cadence.com.
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